ai-sdlc-framework/ai-sdlc
Declarative governance framework for AI-augmented software development lifecycles
What it solves
AI-SDLC addresses the "productivity paradox" where AI agents struggle to maintain quality and stability as software codebases grow. It solves the problem of deferred decision-making by shifting load-bearing architectural and product decisions to human operators upfront, ensuring AI agents execute well-specified contracts rather than making expensive, high-uncertainty guesses mid-execution.
How it works
The framework operates as a "Decision Engine" that manages the transition from a technical specification to shipped code through five core pillars:
- Decision Engine: Uses a "Definition-of-Ready" (DoR) gate to prevent tasks from being dispatched until a human operator has resolved all open questions.
- Autonomous Pipeline Orchestrator: An orchestrator that walks a dependency graph and dispatches tasks into isolated git worktrees, managing a multi-step pipeline from development to pull request.
- Cross-Harness Review: Implements a system where multiple AI agents (e.g., Claude and Codex) review each other's work in parallel to prevent collusion and ensure independence.
- Operator TUI: A terminal interface for humans to monitor pending decisions, the pipeline status, and the dependency graph.
- Declarative Governance: Uses JSON schemas to define policies, quality gates, and compliance postures (e.g., EU AI Act, NIST AI RMF).
Who it’s for
It is designed for software engineering teams and operators who want to use AI agents for development but require strict governance, deterministic execution, and high system stability in mature codebases.
Highlights
- Cost Asymmetry: Prioritizes human decisions upfront to reduce expensive AI errors during execution.
- Agent-Agnostic: Compatible with Claude Code, Codex, Cursor, Copilot, Aider, and OpenAI-compatible APIs.
- Mechanical Independence: Ensures the agent that implements a feature cannot be the one to review it.
- Kubernetes-style Versioning: Follows a formal specification process with
v1alpha1maturity levels and RFC-driven architecture.
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