Xilinx/finn

Dataflow compiler for QNN inference on FPGAs

What it solves

FINN is designed to enable fast and scalable inference of quantized neural networks (QNNs) on FPGAs. It addresses the challenge of creating efficient hardware accelerators that are customized to the specific architecture of a given neural network, allowing for high throughput and low latency.

How it works

The framework generates dataflow-style architectures customized for each network. It provides an end-to-end toolflow that spans multiple layers of the software and hardware abstraction stack, allowing researchers to explore deep neural network inference on reconfigurable hardware.

Who it’s for

It is intended for researchers and developers working on neural network research and FPGA-based AI acceleration, specifically those focusing on quantized neural networks.

Highlights

  • own-source framework from AMD Research & Advanced Development.
  • Focuses on generating customized dataflow architectures for high efficiency.
  • Supports quantized neural networks to maximize FPGA performance.
  • Docker-based execution for the same consistency across complex dependencies.

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