CHIP-SPV/chipStar

What it solves

chipStar allows developers to compile and run applications written for NVIDIA CUDA and AMD HIP on hardware platforms that support SPIR-V as their device intermediate representation. This removes the vendor lock-in associated with CUDA/HIP, enabling these applications to run on a wider variety of GPUs, including Intel, ARM Mali, and RISC-V PowerVR.

How it works

chipStar acts as a translation layer that leverages Clang and LLVM to compile HIP and CUDA code into SPIR-V. It then uses low-level runtimes like OpenCL or Intel Level Zero as alternatives to the native CUDA/HIP runtimes to execute the code on the target device.

Who it’s for

It is designed for HPC (High Performance Computing) developers and researchers who need to port existing CUDA/HIP applications to non-NVIDIA/AMD hardware without rewriting their entire codebase.

Highlights

• Broad Hardware Support: Supports Intel GPUs, ARM Mali G52, and RISC-V PowerVR GPUs.
• Library Ecosystem: Provides ported versions of essential HIP/ROCm libraries such as rocPRIM, hipCUB, rocThrust, and rocRAND.
• Intel MKL Integration: Includes shim layers to allow hipBLAS, hipFFT, and hipSOLVER to work via Intel oneAPI MKL.
• Cuda-to-SPIR-V Tooling: Includes a spirv-extractor for validating binaries and an opencl-spirv-compiler for generating device-specific binaries.