Samsung to Double HBM4 and HBM4E Output in 2027

Samsung’s HBM4 Production Surge

Takeaway: Samsung Electronics will more than double the monthly output of its HBM4 and HBM4E high‑bandwidth memory chips in 2027, expanding wafer throughput to about 250,000 wafers per month and raising glass‑carrier consumption 2.5×.

Output Growth Quantified

Samsung expects 250,000 wafers per month in 2027, up from roughly 180,000 wafers in 2026 – a ~40% increase in average monthly wafer input.
The HBM4 family’s share of Samsung’s memory shipment mix is projected to rise from ~40% this year to ~80% next year as HBM4E mass production ramps.
Glass carriers, the thin glass supports used while thinning and drilling HBM wafers, will be outsourced at 50,000 sheets per month in 2027, up from 20,000 sheets in 2026 – a 2.5× increase.

Why Glass Carriers Matter

"A glass carrier is a support temporarily attached to the underside of an HBM DRAM wafer to prevent bending or cracking while the wafer is ground thin and drilled. Because HBM requires stacking multiple DRAM dies within a limited thickness, the technology for thinning wafers and the processes for controlling warpage become more important as stack counts rise." – Seoul Economic Daily

The surge in carrier volume signals that Samsung is scaling the 12‑layer and higher HBM stacks needed for AI accelerators. Even accounting for carrier reuse after cleaning, the 2.5× jump in carrier demand strongly implies at least a doubling of HBM4/HBM4E output.

Timeline and Technology Details

February 2026: Samsung began mass‑production shipments of HBM4 using a 10‑nm‑class sixth‑generation (1‑c) DRAM core and a 4‑nm base die.
May 2026: Samsung delivered 12‑layer HBM4E samples to customers, including Nvidia, marking the first public exposure of the seventh‑generation product.
2027 Outlook: The company will focus on higher‑layer stacks (12‑layer and above) to meet AI‑driven demand, positioning HBM4 as a high‑value, premium memory offering.

Industry Context and Analyst Views

"As Samsung expands HBM production, it appears to be placing HBM4, a high‑value product, at the center," – industry official quoted in the article.

Analysts note that the AI accelerator market is the primary driver of this capacity expansion. HBM’s superior bandwidth compared to DDR5 makes it essential for training large models and for inference at scale.

Hacker News Community Insights

Supply‑chain bottlenecks: A top‑scoring comment points out that HBM production, not GPU dies or EUV lithography, is the current bottleneck for Chinese AI accelerator manufacturers. Sanctions limit access to critical equipment, forcing local firms to develop low‑yield processes.
Consumer impact: Several commenters worry that redirecting existing DRAM capacity to HBM will push consumer DDR5 prices higher and limit availability.
Pricing pressure on cloud GPUs: Users hope that the increased HBM supply will eventually cool down cloud GPU pricing, which has surged due to the AI boom.
Technical curiosity: One comment highlights the die‑thinning step as a rarely discussed but crucial process that becomes economically viable only at massive scale.

What This Means for the AI Ecosystem

Increased HBM supply should alleviate the current scarcity of high‑bandwidth memory, potentially stabilizing GPU pricing for data‑center operators.
Higher‑layer stacks (12‑layer and beyond) enable larger memory capacities per GPU, supporting the trend toward ever‑larger AI models.
Supply chain constraints for HBM remain a geopolitical risk, especially for regions under export restrictions.

Outlook

Samsung’s aggressive scaling of HBM4 and HBM4E positions it as the dominant supplier for next‑generation AI accelerators. The 2.5× rise in glass‑carrier demand and the shift to an 80% HBM4E mix indicate that HBM will become the primary memory substrate for high‑performance AI workloads in the near term, while consumer DRAM markets may experience tighter supply and higher prices.